preliminary data sheet ice60n160 b d s g t0263 standard metal heatsink 1=gate, 2=drain, 3=source . ice60n160 b n - channel enhancement mode mosfet features ? low r ds(on) ? ultra low gate charge ? high d v /d t capability ? high unclamped inductive switching (uis) capability ? high peak current capability ? increased transconductance performance ? optimized design for high performance power systems product summary i d t a =25 o c 23.8a max v ( br)dss i d =250ua 650v min r ds(on) v gs =10v 0.14 typ q g v ds =480v 85nc typ icemos and its sister company 3 d semi own the fundamental patents for superjunction mosfets . the majority of these patents have 17 to 20 years of remaining life . this portfolio has granted patents issued in usa, china, korea, japan, taiwan & europe . maximum ratings b , at t j =25 o c , unless otherwise specified parameter symbol conditions value unit continuous drain current i d t c =25 o c 23.8 a pulsed drain current i d, pulse t c =25 o c 72 a avalanche energy, single pulse e as i d =6a 690 mj avalanche current, repetitive i ar limited by t j max 6 a mosfet d v /d t ruggedness d v /d t v ds =480v, i d =23.8a, t j =125 o c 50.0 v/ns gate source voltage v gs static 20 v ac ( f >1hz) 30 power dissipation p tot t c =25 o c 208 w operating and storage temperature t j , t stg - 55 to +150 o c a when mounted on 1inch square 2oz copper clad fr - 4 b preliminary data sheet C specifications subject to change 1 sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b parameter symbol conditions values unit min typ max thermal characteristics thermal resistance, junction - case a r thjc - - 0.6 o c/w thermal resistance, junction - ambient a r thja leaded - - 68 soldering temperature, wave soldering only allowed at leads t sold 1.6mm (0.063in.) from case for 10 s - - 260 o c electrical characteristics b , at t j =25 o c , unless otherwise specified static characteristics drain - source breakdown voltage v (br)dss v gs =0 v, i d =250a 650 675 - v gate threshold voltage v gs(th) v ds = v gs , i d =250a 2.5 3 3.5 zero gate voltage drain current i dss v ds =650v, v gs =0v, t j =25 o c - 0.1 1 a v ds =650v, v gs =0v, t j =150 c - - 100 gate source leakage current i gss v gs = 20 v, v ds =0v - - 100 na drain - source on - state resistance r ds (on) v gs =10v, i d =11.9a, t j =25 o c - 0.14 0.16 ? v gs =10v, i d =11.9a, t j =150 o c - 0.42 - gate resistance r g f =1 mhz, open drain - 4 - ? dynamic characteristics input capacitance c iss v gs =0 v, v ds =25 v, f =1 mhz - 2750 - pf output capacitance c oss - 980 - reverse transfer capacitance c rss - 25 - transconductance g fs v ds > 2 *i d *r ds , i d = 11.9a - 25 - s turn - on delay time t d(on) v ds =480v, v gs =10v, i d =23.8a, r g =4 ? (external) - 10 - ns rise time t r - 5 - turn - off delay time t d(off) - 67 - fall time t f - 4.5 - 2 sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b 3 parameter symbol conditions values unit min typ max gate charge characteristics gate to source charge q gs v ds =480 v, i d =23.8a, v gs =0 to 10 v - 16 - nc gate to drain charge q gd - 34 - gate charge total q g - 85 - gate plateau voltage v plateau - 6 - v reverse diode diode forward voltage v sd v gs =0v, i s= i f - 1.0 1.2 v reverse recovery time t rr v rr =480v, i s= i f , d if i d t =100 a/s - 440 - ns reverse recovery charge q rr - 8 - c peak reverse recovery current i rm - 35 - a sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b 4 sp - 60 n1 60 b - 000 - 2a 06/05/2013 0 10 20 30 40 50 60 70 0 5 10 15 20 i d - drain current (a) v ds - drain - to - source voltage (v) output characteristics v gs =10 to 7v 5v 6v 0 10 20 30 40 50 60 70 0 2 4 6 8 10 i d - drain current (a) v gs - gate - to - source (v) transfer characteristics t j = 150?c 25?c 0 50 100 150 200 250 300 350 0 10 20 30 40 50 60 70 r ds(on) - on - state resistance (m) i d - drain current (a) on resistance vs drain current v gs = 10v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -50 -25 0 25 50 75 100 125 150 r ds(on) - on state resistance (normalized) t j - junction temperature (?c) on resistance vs junction temperature v gs = 10v i d = 12a 0 1 2 3 4 5 6 7 8 9 10 0 20 40 60 80 100 v gs - gate - to - source voltage (v) q g - total gate charge (nc) gate charge 480v v ds = 23.8a i d = 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 125 150 v gs(th) - gate threshold voltage (normalized) t j - junction temperature (?c) i d = 250 a gate threshold voltage vs junction temperature
preliminary data sheet ice60n160 b 5 sp - 60 n1 60 b - 000 - 2a 06/05/2013 1 10 100 1000 10000 100000 0 100 200 300 400 500 600 c - capacitance (pf) v ds - drain - to - source voltage (v) capacitance crss coss ciss 0.8 0.9 1.0 1.1 1.2 -50 -25 0 25 50 75 100 125 150 v (br)dss - drain - to - source breakdown voltage (normalized) t j - junction temperature (?c) i d = 1ma drain - to - source breakdown voltage vs. junction temperature 0.01 0.1 1 10 100 1 10 100 1000 i d - drain current (a) v ds - drain - to - source voltage (v) r ds(on) limit package limit thermal limit dc single pulse, tc = 25 o c, t j =150 o c, v gs = 10v 1ms maximum rated forward biased safe operating area 100us r ds(on) limit package limit thermal limit single pulse, tc = 25 o c, t j =150 o c, v gs = 10v maximum rated forward biased safe operating area 10us 10ms 0.00 0.01 0.10 1.00 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 r(t), transient thermal resistance (normalized) t - time (s) single pulse 0.02 0.05 0.1 0.2 0.5 transient thermal response, junction - to - case
preliminary data sheet ice60n160 b 6 sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b 7 sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b icemos superjunction patent portfolio icemos granted patents us7,429,772 us7,439,178 us7,446,018 us7,579,607 us7,723,172 us7,795,045 us7,846,821 us7,944,018 us8,012,806 us8,030,133 3d semi patents licensed to icemos us7,041,560b2 us7,023,069b2 us7,364,994 us7,227,197b2 us7,304,944b2 us7,052,982b2 us7,339,252 us7,410,891 us7,439,583 us7,227,197b2 us6,635,906 us6,936,867 us7,015,104 us9,109,110 us7,271,067 us7,354,818 us7,052,982, us7,199,006b2 note: additional patents in china, korea, japan, taiwan, europe have also been granted to icemos and 3d semi for superjunction mosfets with 70 additional patent applications in process in the usa and the above listed countries. 8 sp - 60 n1 60 b - 000 - 2a 06/05/2013
preliminary data sheet ice60n160 b 9 sp - 60 n1 60 b - 000 - 2a 06/05/2013 marking information yy = last two digits of the year ww = work week calendar on icemos subcon assembly & test house * = initial for icemos subcon assembly and test house xxxx = wafer lot id 00 = may be used for wafer id in a special case. = " 00" is used unless specified. ice60n160 = ice is icemos logo and 60n160 is a designated device part number yy ww * xxxx 00 ice60n160
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